דרושים » מדעים מדוייקים » Application Engineer

At our company, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, we are a place to thrive, learn, and lead.
Your Team, Your Impact
The System Level Electrical Validation (SEV) team is the physical layer gatekeepers of Switching Group, eager to discover and solve problems before customers encounter them. In charge of envisioning and adopting test environments and tools and executing test scenarios that will make it possible for smooth and debug-free adoption by our customers. Plan setups and execution for early detection of problems and for extensive coverage. Proactively drive other teams to provide the necessary deliveries and fixes for effective execution by the team and for customer use. Provide accurate, well-formed reports of Hi-Speed interfaces to the development team and to our customers, including proper settings to use with specific optical modules and cables. Possess deep understanding of the high-speed interfaces and IPs, allowing early stages of debug.Be recognized by peers in the company as a top-notch professional team with highly effective impact on our results.
What You Can Expect
Automation Design and Development: Develop and implement automation to improve the efficiency of Ethernet switching silicon/system validation.
Data analysis tools development: Design and build custom tools to support automated data analysis and statistics on big data.
System Level Electrical Validation: Conduct thorough testing and validation of the most advanced high-bandwidth Ethernet switching silicon/system to ensure they meet the required specifications.
Lead debug: Debug of complex switching silicon/system.
Collaboration: Work closely with cross-functional teams, including software developers, design engineers, and operations teams, during the debug.
Continuous Improvement: Stay up-to-date with the latest automation technologies and best practices, and continuously seek opportunities to improve existing solutions.

AWS Utility Computing (UC) provides product innovations from foundational services such as Simple Storage Service (S3) and Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWSs services and features apart in the industry. As a member of the UC organization, youll support the development and management of Compute, Database, Storage, Internet of Things (Iot), Platform, and Productivity Apps services in AWS. Within AWS UC, Dedicated Cloud (ADC) roles engage with AWS customers who require specialized security solutions for their cloud services.

Web Services (AWS) Hardware Engineering is a fast growing and leading-edge research and development team that creates compute, storage server and machine-learning designs for our innovative web service and e-commerce technology platforms. Our designs are industry-leading in terms of performance, frugality and operational excellence, and are critical to the success of the AWS business and the hundreds of thousands of customers who use utility computing today.

Annapurna Labs, as part of AWS, is looking for a System Integration Lead to be part of defining, shaping and integrating solutions to next generation of our cloud platforms. Our success depends on our world-class server infrastructure; were handling massive scale and rapid integration of emergent technologies.

Key job responsibilities
As System Integration Lead engineer in the PI (Product Integration) team youll get involved with the first architecture discussions and decisions through design development, readiness to production until product exposure to customer. Youll handle hardware and software system related aspects, such as: mechanical design, thermal and power design, signal integrity of high speed interfaces (PCIe, SATA, Ethernet), boot flows, recovery flows, remote debug hooks, firmware live-update flows, system health monitoring sensor, report flow, etc... Youll shape screening test content in production line and in data-center, lead debug analysis in fleet, define repair Instructions to optimize capacity recovery, participate in game-days (failures recovery practice before GA) of new products in data-center and own product integration methodology definition and documentation. Youll provide leadership in the application of new technologies to large scale product deployments in a continuous effort to deliver a world-class customer experience. This is a fast-paced, intellectually challenging position, and youll work with thought leaders in multiple technology areas. Youll have high standards for yourself and everyone you work with, and youll be constantly looking for ways to improve your products performance, quality and cost. Were changing an industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today.

About the team
Diverse Experiences
AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasnt followed a traditional path, or includes alternative experiences, dont let it stop you from applying.

a fabless semiconductor company established by semiconductor industry veterans and is part of Web Services (AWS). We are developing leading edge products widely used in the cloud. Annapurna Labs is like a big start-up in AWS. We develop using cutting-edge technologies, work with amazingly talented engineers, innovate and truly shape the future. Working for Annapurna Labs is thrilling, fast-paced, and a constant learning experience.
Our offices are located in Sarona/Tel Aviv and Matam/Haifa.

Key job responsibilities
Design-for-Test (DFT) is a multi-disciplinary field of growing complexity that involves close cooperation and mutual work with multiple VLSI engineering groups, including architecture, frontend design, verification, physical implementation, signal integrity, test, reliability and more. DFT engineers participate in the whole chip design process from start to end, defining our future products, implementing them and debugging real devices in fleet. They hold a lot of responsibility and are a major part of our success.

In this role you will be part of the chip design group, working on:
- Development and implementation of DFT architecture
- Design and verification of DFT logic and components
- Generation of high-quality test and debug patterns
- Static timing analysis of DFT modes
- Silicon bring-up, diagnosis and support for physical failure analysis

About the team
Diverse Experiences
values diverse experiences. Even if you do not meet all of the preferred qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasnt followed a traditional path, or includes alternative experiences, dont let it stop you from applying.

Why AWS
Web Services (AWS) is the worlds most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating thats why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses.

Work/Life Balance
We value work-life harmony. Achieving success at work should never come at the expense of sacrifices at home, which is why flexible work hours and arrangements are part of our culture. When we feel supported in the workplace and at home, theres nothing we cant achieve in the cloud.

Inclusive Team Culture
Here at AWS, its in our nature to learn and be curious. Our employee-led affinity groups foster a culture of inclusion that empower us to be proud of our differences. Ongoing events and learning experiences, including our Conversations on Race and Ethnicity (CORE) and AmazeCon (gender diversity) conferences, inspire us to never stop embracing our uniqueness.

Mentorship and Career Growth
Were continuously raising our performance bar as we strive to become Earths Best Employer. Thats why youll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.

AWS Utility Computing (UC) provides product innovations from foundational services such as Simple Storage Service (S3) and Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWSs services and features apart in the industry. As a member of the UC organization, youll support the development and management of Compute, Database, Storage, Internet of Things (Iot), Platform, and Productivity Apps services in AWS. Within AWS UC, Dedicated Cloud (ADC) roles engage with AWS customers who require specialized security solutions for their cloud services.

Annapurna Labs, a division at Web Services (AWS), develops innovative hardware and software for AWS cutting-edge cloud infrastructure.
Working for Annapurna Labs is thrilling, fast-paced, and a constant learning experience.
Annapurna Labs is looking for a leader to join the Formal Verification team. This team takes a central part of the verification effort, and vision. Goals are shared with other verification teams.

About the team
*Diverse Experiences
values diverse experiences. Even if you do not meet all of the preferred qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasnt followed a traditional path, or includes alternative experiences, dont let it stop you from applying.
*Why AWS
Web Services (AWS) is the worlds most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating thats why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses.
*Work/Life Balance
We value work-life harmony. Achieving success at work should never come at the expense of sacrifices at home, which is why flexible work hours and arrangements are part of our culture. When we feel supported in the workplace and at home, theres nothing we cant achieve in the cloud.
*Inclusive Team Culture
Here at AWS, its in our nature to learn and be curious. Our employee-led affinity groups foster a culture of inclusion that empower us to be proud of our differences. Ongoing events and learning experiences, including our Conversations on Race and Ethnicity (CORE) and AmazeCon (diversity) conferences, inspire us to never stop embracing our uniqueness.
*Mentorship and Career Growth
Were continuously raising our performance bar as we strive to become Earths Best Employer. Thats why youll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.

we are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At our company, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, we are a place to thrive, learn, and lead.
Your Team, Your Impact
System Level Electrical Validation (SEV) team is the physical layer gate keepers of Switching group , eager to discover and solve problems before customers encounter them.
In charge of envisioning and adopting test environments and tools and executing test scenarios that will make it possible for smooth and debug free adoption by our customers.
Plan setups and execution for early detection of problems and for extensive coverage.
Proactively drive other teams to provide the necessary deliveries and fixes for effective execution by the team and for customer use.
Provide accurate well-formed reports of Hi-Speed interfaces to the development team and to our customers, including proper setting to use with specific optical modules and cables.
Possess deep understanding of the Hi-Speed interfaces and IPs allowing early stages of debug.
Be recognized by peers in the company as a top-notch professional team with highly effective impact on our results.
What You Can Expect
Owner of the high-speed I/O (SerDes) post-silicon validation activates.
Owner of the PVT validation setups definition, bring-up, and handling.
Take ownership of the debug activities of the testing failures, from the root cause analysis phase till the failure solution approval.
Coordinate with the different teams about debug activities results and findings.

Required Network Register Transfer Level Design Engineer, Cloud
About the job:
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will be part of a team developing Application-Specific Integrated Circuit (ASIC) used to accelerate networking in data centers. You will have dynamic, multi-faceted responsibilities in areas such as project definition, design, and implementation. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators. You will be responsible for performance analysis for an end to end networking stack using your deep knowledge of Remote Direct Memory Access (RDMA) based transports.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our platforms, we make our product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities:
Participate in evaluation of future ASIC designs and general architecture for executing our data center networking roadmap, off-the-shelf components, vendor co-developments, custom designs, and chiplets.
Collaborate in developing new layer protocols for data center networking.
Understand how everything interacts with software and other ASIC subsystems to implement data center networks.
Define performance hardware/software interfaces. Write micro-architecture and design specifications.
Define efficient micro-architecture and block partitioning/interfaces and flows.

Required CAD ATE Engineer
About the job
Our custom-designed machines make up one of the largest and most powerful computing infrastructures in the world. The Hardware Testing Engineering team ensures that this cutting-edge equipment is reliable. In the R&D lab, you design test equipment for prototypes of our machinery and develop the protocols used to scale these tests for the entire global team. Working closely with design engineers, you give input on designs to improve our hardware until you're sure it meets our standards of quality and reliability.
With your technical expertise, you will manage project priorities, deadlines, and deliverables. You will design, develop, test, deploy, maintain, and enhance software solutions.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our platforms, we make our product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities:
Create software solutions that improve the hardware post-silicon testing process through automation. This includes, but is not limited to, developing and maintaining an ATE program development infrastructure for both production and development environments.
Propose, design and implement software automation that directly addresses bottlenecks in today's post-silicon test flow, from DFT to ATE.
Work directly with a Hardware team on projects - prototype and then deploy tools to make a positive impact on Google's chip hardware development process.
Participate in, or lead design reviews with peers and stakeholders to decide amongst available technologies.
Review code developed by other developers and provide feedback to ensure best practices (e.g., style guidelines, checking code in, accuracy, testability, and efficiency).

At our company, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, we are a place to thrive, learn, and lead.
Your Team, Your Impact
we custom processor/ASIC solution leverages decades of expertise to deliver cutting-edge, high-performance processor chips for server, 5G/6G, automotive, and networking applications. Our team is responsible for the physical design and methodology of next-generation processors in advanced CMOS process technologies. This role provides a unique opportunity to contribute to both design execution and the development of methodologies that enable efficient and robust chip development.
What You Can Expect
Collaborate with a global team to support both physical design and methodology for complex chip projects.
Maintain, enhance, and support our Place and Route Flow using industry-standard EDA tools.
Perform synthesis, place and route, timing analysis, and timing closure for multiple intermediate and complex logic blocks.
Develop and implement timing and logic ECOs, and work with the RTL design team to address congestion and timing challenges.
Partner with the global timing team to debug and resolve block-level timing issues at the partition level.
Engage with diverse engineering challenges in a collaborative, innovative environment.